r/vlsi

Hey dear members,

I'm a final year ece student, avg in studies (performance based).... Willing to start my career in vlsi!

I have a decent gate score, and will be joining a mid tier nit for mtech in vlsi design.

I want to grab the internship within 6 months from now (on campus)

I have a basic understanding of CMOS and digital electronics. Will brush it up now.

How shall I target it?

What shall be the roadmap?

I'm not so good at coding though but would love to learn.

Pls give me a complete structured plan to follow and is this achievable in 6 months??

With decent projects, and knowledge?

(Personally I would love to go with the physical design side, but if the prerequisites are to cover the RTL side then I'm also ready for that)

Anyone is working in VLSI Digital domain or studying in it? I want to learn and build projects in this domain. I'm having 2 months and having whole day to learn before placements. Please anyone provide me flowchart and resources for it.

Just joined as an intern at Intel in Physical Design, suggest topics and key concepts to brush up early to stay ahead of the curve and perform well

I just want to know on average who pays significantly higher compare to each other in India.

Qualcomm vs AMD

Hi, I'm hiring for Anthriq, an early-stage startup building custom silicon from scratch.

Small team with real ownership.

Open roles: RTL, Verification, Physical Design, Compiler/Toolchain, all senior, hands-on.

Looking for engineers who've been through a full chip cycle and want to do it again with full ownership from day one.

Apply here - anthriq.com/careers

Has anyone attended takshila institute vlsi in bangalore or hyderabad? I am thinking of joining them for uvm course

The program image

Hello guys I am a final year student in a Tier - 3 College and interested in vlsi domain currently doing BE in Electronics and Communication, is this course worth it and should I invest this large sum of money at once for this course. I have attached the brochure for the same along with this. The whole Level 1 and Level 2 with all the assignments and hands on learning and costing around 27k and my college is not a part of bulk registration. I wanna know at this stage should I be doing this course . this is the brocure

I got fired and had a 3 month notice to be served. I'm 25 M with 1.5yrs exp in telecommunication mnc, 15 LPA in india. Now I'm having 3 domains I can switch, depending upon the openings.

1. Communication related but I'm not prepared well for the industry as I'm into testing majorly

2. VLSI (Service based company pays 7-9lpa) no way I can go for MNCs ig.

3. Pure software. Somehow I'm thinking of it as the last option as I have 6 months experience in cpp and some script and automation using python and try converting remaining year as software experience too. And I also suggest what else other than dsa and oops I should study to get a job in software.

Why is the option better?

Who all received the last round mail today for the in-person interview?

Has anyone here gone through Google Silicon Design University Hiring recently? I had an HR screening and was told to wait 1–2 weeks. Curious how long it actually took before interview scheduling or rejection. Would appreciate timeline details.

I was fired today by my manager, I'm 26M, 1.5 yrs exp in communication engineering (software) . I don't accept this and I was pressured by the manager to go through PIP or accept resignation. I'm not sure about how I can get a job in this market as I was majorly into testing... I'm feeling like I quit from life. I'm worried about the job market and what if I'm unplaced forever.

What should I do? Help me.

I have an option to freeze bits hyd vlsi, i might get pilani vlsi in the next rounds, should i go hyderabad or pilani? If someone has any idea please help out

Hello guys ,

I got Vitmee rank 1975 , I am from EEE background.

I am also working in a startup in Bangalore.

Does it worth doing in vit vellore or chennai in vlsi or power electronics ?

Welcome to OpenChipDesignIndia.

This community is for students, engineers, educators, makers, and semiconductor enthusiasts who want to learn chip design by actually building.

Here, we discuss VLSI, RTL design, Verilog, RISC-V, FPGA, physical design, open-source EDA tools, RTL-to-GDS flows, tapeout journeys, student projects, semiconductor careers, and India’s growing chip design ecosystem.

The goal is simple: make chip design more practical, visible, and accessible for everyone.

You are welcome to:

Ask beginner or advanced technical questions
Share your chip design, FPGA, RISC-V, or embedded projects
Discuss career doubts in VLSI, physical design, RTL, verification, and semiconductor roles
Post useful tools, tutorials, papers, repositories, and learning resources
Share your progress, failures, bugs, fixes, and lessons learned
Discuss how India can build a stronger semiconductor talent pipeline

A few expectations:

Be respectful. Many people here are learning.
Avoid gatekeeping. Simple questions are welcome.
Give practical answers whenever possible.
No spam, fake hype, or low-effort self-promotion.
Promote learning, building, and honest technical discussion.

Whether you are a school student blinking your first LED on an FPGA, an engineering student learning Verilog, a working professional entering VLSI, a faculty member building a lab, or a chip designer sharing experience — you belong here.

Let’s learn chips. Build chips. Share chips.

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