r/Physics

Hello everyone,

My colleagues and I created a high-resolution digital measurement system using a Cyclone V FPGA [1, 2]. The device has hybrid time-to-digital converter (TDC) / binary digital storage oscilloscope (DSO) functionality, and I developed and patented it during my physics PhD research in order to precisely study ultrafast signals at low cost.

Others have contacted me saying that they found the publication useful (it contains many low-level FPGA details), so I wanted to share it here. Moreover, I'm developing a PCB version (FPGA + SMA connectors etc. in a handheld form factor) as a replacement for existing time-taggers / digital oscilloscopes. My question to this community is:

Would you potentially be interested in purchasing such a device?

The goal is to significantly reduce cost compared to leading time-taggers / oscilloscopes while offering similar capabilities. I'm in talks with a leading metrology lab for independent certification, but would not go through all the trouble if only I would end up using it. So, let me know if you might be interested in a digital measurement device with the specs below, printed in the next 6-12 months (16-level analog bandwidth is possible but would likely double the price and development time).

Happy to answer any questions, and thank you for any feedback!

- Dr. Noeloikeau Charlot

Spec sheet (TBD):

Target Price: $250 - $750

Architecture: FPGA carry-chain

Digital Resolution (Bin Size): 5 - 15 ps

RMS Jitter (Single-Shot Precision): 1 - 30 ps RMS

Number of Channels: 1 - 8 channels

Dead Time (Min Inter-Event): 5 ps - 1.5 ns

Readout Rate (Data Transfer): ~3 Gbit/s

Memory / Buffer Size: 1024 Kbit + ~1 GB DDR

Input Bandwidth (Max Input Freq): 200 MHz

Edge Capture Per Channel: Simultaneous rise & fall

Trigger / Threshold: Fixed comparator

Input Impedance: 50 Ohm (SMA)

Host Interface: USB 3.0

Form Factor: Thumbstick

Software Ecosystem: Python

References:

[1]: https://ieeexplore.ieee.org/document/9585689

[2]: https://patents.google.com/patent/US20260023145A1

Abstract:

In classical physics, events follow a definite causal order: the past influences the future, but not the reverse. Quantum theory, however, permits superpositions of causal orders—the so-called indefinite causal orders (ICOs)—which can provide operational advantages over classical scenarios. Verifying such phenomena has sparked significant interest, much like earlier efforts devoted to refuting local realism and confirming quantum entanglement. To date, demonstrations of ICO have all been based a process called the quantum switch and have relied on device-dependent or semi-device-independent protocols. Achieving a device independent verification of ICO would imply that nature allows for correlations that do not respect causality, independent of any experimental assumptions or underlying theoretical description of the experiment. To this end, a recent theoretical development introduced a Bell-like inequality that allows for fully device-independent verification of ICO in a quantum switch. Here we implement this verification by experimentally violating this inequality. In particular, we measure a value of 1.8328 ± 0.0045, which is 18 standard deviations above the definite causal order bound of 1.75. Our work presents the first implementation of a device-independent protocol to verify ICO, albeit in the presence of experimental loopholes. This represents an important step toward the device-independent verification of an ICO and provides a context in which to identify loopholes specifically related to the verification of ICO.

Paper: https://journals.aps.org/prxquantum/pdf/10.1103/5t2y-ddmt

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