u/lazy_bug05

▲ 7 r/vlsi

What might be the solution??

Design a Digital Circuit for the following specifications:

a. There are 3 inputs A, B, and C.

b. There are two outputs P and Q.

c. The circuit behaves like a half adder when C = 0 and behaves like a half subtractor when C = 1. Implement this using only 4 number of 2:1 MUXs.

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u/lazy_bug05 — 1 day ago