u/Specialist_Ad8165

Hello dear FPGA'ers

I am currently frustrated and I need help.

I have created a custom AXI4 MM slave IP in vivado/VHDL and connected to the MPSoC through axi smc.

Now I want to use a PS DMA to read data from the DDR and transfer this data to my IP.

But the resources on the web are just overwhelming.

Below is my block diagram.

I am using Vitis for the software and my PS is an R5 and I am using FreeRTOS for that.

I have already tried with direct CPU writes and checked the ILA and it worked (I saw my data on the ila lines)

Now I'd like to move further so that my CPU can focus on other tasks while the DMA is doing the work in the background.

How do I configure this PS DMA?

Help.

Thanks