▲ 6 r/chipdesign
XNOR Gate transistor-level implementations
For XNOR gate, I have these multiple different transistor-level implementations, which variant would you guys recommend and why ?
-> Figure 5 of https://eepower.com/technical-articles/cmos-implementation-of-xor-xnor-and-tg-gates/#
-> Figure 7.6 of https://www.researchgate.net/public...ATE_LOGIC_FOR_POWER_OPTIMIZATION/figures?lo=1
-> two different implementations in https://en.wikipedia.org/wiki/XNOR_gate#CMOS
-> Figure 1 till Figure 6 of [https://www.researchgate.net/publication/228447428\_A\_new\_design\_of\_XOR-XNOR\_gates\_for\_low\_power\_application](http://A new design of XOR-XNOR gates for low power application)
u/Lemon_Salmon — 1 day ago
