▲ 1 r/chipdesign
Ive been making RTLs for some of my projects and now a senior recommended using yosys
If anyone knows how anf what to do with yosys pls help
Ive been using iverilog so far
u/FluffyPanda602 — 15 days ago
Ive been making RTLs for some of my projects and now a senior recommended using yosys
If anyone knows how anf what to do with yosys pls help
Ive been using iverilog so far