u/Low_Car_7590

Hi all,

I’m using Chipyard with Spike to generate checkpoints, and then running BOOM simulations with Verilator.

Here’s my current setup:

• Warm-up instructions: 20M
• Measured (simulated) instructions: 1M

(I know this is a bit of a weird configuration…)

What I observed is that the CPI results across different checkpoints — even from different workloads — are almost identical (~2.57), with differences only appearing at around the 3rd decimal place.

From what I understand (and from some prior discussion), a 1M instruction window might be too short, and the CPI I’m getting could essentially be dominated by noise. I’ve also seen suggestions that simulation windows should be at least 10M–100M instructions to capture meaningful performance behavior.

However, I’m still not fully convinced:

• Is this behavior expected given such a short simulation window?
• Or could this indicate a potential issue in my statistics collection or simulation setup?

Any insights or similar experiences would be greatly appreciated!

I’m familiar with Verilog and SystemVerilog, and I’ve been using testbenches to verify simple systems. However, when I tried using UVM for verification, I found that I constantly need to write a lot more modules like drivers, monitors, reference models, etc. The effort involved in setting up UVM seems to exceed the effort of just writing the system itself.

At this point, I still don’t fully understand the main benefit of UVM. For those of you who have experience with it, is UVM really worth the effort? If so, could you explain why?