u/Girl_Alien

Advice needed

Hi, I'm your mod. I live here in High Point. I haven't posted in a while. It seems some here don't like it when I discuss the challenges I face. I'm disabled due to having had a bad fall early in life. The consequences of that include things like being of the asexual orientation, being fiercely independent, never wanting/needing help unless I ask for it or get asked in advance, needing to live a life focused on authoritarianism/rules, and needing to be shielded from unsolicited interactions. I'm obviously asking for help in this thread since I am clearly asking. I've always had a temper since the injury, and I've always been more sensitive to most things.

To me, if you must ask someone for permission before you have sex with them, and you don't go up to them in public and undress them, then why should other unwanted help/interactions be any different? If my body is my property, so is the rest of me. My hopes, my plans, my unique ways of doing things, my opportunities, my heart, my soul, etc., and every other aspect of me should be 100% under my control (or those I license to do such things, such as God), as well.

I ride a bicycle nearly everywhere. It's not a personal statement, not a political statement, not something I like or am interested in, and has no sexual or other hidden meaning. It's an adaptation due to the brain injury.

It's very easy to get along with me; just do nothing and trust me to run my own life. It should be easy to give me the same basic respect given to all adults (obviously, I'd have to earn more than that to get more than that), assume the best in me and all other strangers, and assume everything I do or don't do is correct for my own private reasons that are irrelevant to you. I live alone and am happiest when alone, since that's the only time when I feel on top of the world, get to be proud of what I can do, and not have my plans sabotaged by others who second-guess me or assume they know what is best for me. I have different ways of doing nearly everything than most, and I should be allowed to do things my own way without others assuming the worst in me, such as me being inferior/broken/vulnerable enough to need any assistance I do not directly grant verbally or in writing, in advance. My view is that we all have the right to socialize, but no one is entitled to do it with any specific person who doesn't grant it.

It's most helpful to take me at face value. Like if I'm not moving in any situation, the correct interpretation is that I'm busy or otherwise don't want to go, not to read more into it, such as acting like you need to move, wait on me, or do anything for me. If I get somewhere last or I'm not moving from an unmarked intersection, I need others to act the same as if I'm not there and simply go on about their business. Just because someone sees a stimulus, it doesn't mean they're required to act upon it. Taking a break on the sidewalk or shoulder of the road is no different from a driver in a car pulling off to the side and taking a break out of other people's way. There's no practical or legal need to ever give a cyclist more room, time, or distance than you would any other driver.

Many people misunderstand what "yielding" means. Yielding, in legal terms, often refers to allowing vehicles already moving to go first. It doesn't mean pressuring those who don't want to go into going first. If a cyclist is taking longer than 10 seconds and is never making moves toward the curb, that nearly always means they need to stay. If they're out of the way and not in the path you're planning on taking or otherwise blocking you, they're irrelevant to you, and there's nothing to do that would be appreciated.

If a cyclist gets somewhere last and takes longer than 10 seconds without making assertive movements to indicate intent like riding toward the curb, rocking forward and back like they're impatient, etc., it makes no sense to back up, wave your hands, or otherwise engage to get them to go, as they clearly don't want to go. What's the harm in letting a stopped cyclist linger and take a break out of everyone's way in a store parking lot after shopping, and for you to just go around them? Why is it so important to pressure them into going first when they're not interested in going and aren't blocking you?


TL;DR: Please tell me how I can get somewhere last on a bicycle and get to take a break, be ignored, and get to stay for as long as I want after others are gone, so I can take a break or go last without help. I leave nothing to chance, and if I get somewhere last, I expect to be held to the highest standards of fairness by being allowed to wait my turn and go last or stay. I need to ride more as my sanity and health depend on it.

PS., In some ways, I'm like the common yard weed known as plantain (not the banana bush of that same name). It grows in places where a lot of other plants won't survive (like cracks in the sidewalk). And you can walk all over it, ignore it, take it for granted, and it thrives. I tend to thrive in harsh environments, solitaire environments, conservative environments, and strict environments.

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u/Girl_Alien — 4 days ago

I've thought of multiple overall CPU designs in my mind, something that seems to be fading with age, TBH.


I'd like 8 bits minimum. I like the Gigatron TTL computer's design, and I like the Gray-1's concept, though everything shouldn't be done with ROMs (flip-flops and counters are faster for those tasks, and using those eliminates the need for Gray Code, which adds to the critical path). I don't know if I'd want to use a ROM-based ALU. That can be more flexible, but going below 70ns is hard to find, and finding any is harder than it was 6 years ago. Still, being able to multiply and do some smaller division in a single cycle, shift without a crapload of muxes or tristate buffers, compare for nearly every op, rescale random integers, etc., seems very convenient. I've thought up a simple ROM-based multiplier that can be made to handle all 4 types of multiplications in regard to signage. (++, +-, -+, --). Reserve 2 address lines to select which of the 4 types, and make the 00xxxxxxxx be for unsigned, whether the positive portion of signed (16K range) or truly unsigned (64K range). So let bit 7 of both operands control that and have board logic to force those bits to 0 when the control unit specifies unsigned.


I'd want a random number opcode. On an opcode for rescaling random integers, you can have the random short integer and the max value as operands. Then you can have a balanced. If the number is equal to or greater than the cap, the original number is returned. Otherwise, you get a balanced set of those for the other numbers. That doesn't need division to get a modulus, and it doesn't use the biased scaling formulas. For instance, masking for powers of 2 minus 1 only works well when you want zero to that number, or 1 to an even power of 2 (after adding 1 to adjust). But for other numbers, it's quite biased. Adding nibbles to get 0-30 is not a good idea, since the lower half of the numbers occur at least twice as often, or much more. (How do you get 5? 0+5, 5+0, 1+4, 4+1, 2+3, 3+2; that is 6 out of 225 combinations of the 2 nibbles, while only 1 out of 225 can be 30 or zero.) So a balanced chart is a better approach. I've considered what to do when a fully balanced set cannot be provided. In that case, I'd say to have a cull/exception bit. Return a number in range, but have a flag to denote bias. A coder could poll it out or keep the result at their discretion. For instance, let's say you want 0-2. So you specify 2 as the limiter. The problem is that a range of 3 goes into a range of 256 a total of 85 times with a remainder of 1. So, one could have 255 return 0-2, but flag it (or any other base number) as being an exception. If that is not acceptable, the coder could fetch another.


So I'd want 8-16 bits. I'd likely want a microcoded or purpose-built interpreter engine (like make something similar to the Gigatron TTL CPU but add another program counter set and specialized instructions to make Harvard to VN conversion easier and make it closer to a microcoded machine -- and that 2nd PC set would not be for interrupts but for Native vs. Interpreted).

On the style of microcode (or Harvard-like core), I'd probably want to use inline, tail-coded. As for the underlying microcode architecture, I'd probably want either RISC or NISC (no instruction set computing). RISC would be easier to code, but NISC would be a simpler architecture, since you wouldn't need much of a control unit. Instead of decoding the ROM, you can have as many of the signals as you can be the opcode. That would make for a long control word, but that would be in the core/microcode ROM, not in the exposed instruction set.

To do the inline microcode part, the "outer" program counter would load the opcode from RAM, and the RAM would make the "inner" PC jump to the start of the opcode handler. I believe shifting left at least 4 places would be good. That would mean you can use all 256 "slots" without addressing overhead, since 16 bytes are reserved for every instruction. If you need more, you can jump elsewhere or merge into another handler, as there would be enough room to do so, without needing prefixes. So it would be inline most of the time, and split between regions outside the opcode space


As for overall machine architecture, I'd want to find a way to put stuff on the screen without delaying the CPU. I mean, the Gigatron spends nearly 4/5 the time putting stuff on the screen and other bit-banging. Having a proper bus-mastering DMA would actually simplify coding the native code and eliminate hundreds of context changes per frame, for instance. Marcel didn't see the point, but that would help a lot more than anticipated since there would be fewer context changes as the video fetches would not clobber the CPU registers.

One way some maintain separate video memory is to use a register and a mux to access video RAM whenever you want (artifacts be damned). So the display shows what is in the register last, while a mux gives the CPU the priority. So you get dropped lines and other artifacts, but the CPU never has to wait. Or, should I use a FIFO for this?

Or, maybe, I should do it more like VERA-style (or even use an actual VERA, preferably the "Otter" version, as those can be incorporated into most designs) with an MCU. So maybe have bus sniffing/snooping. Like have a few paragraphs to a page for IO registers, and use an MCU's internal memory for the frame buffer. Then monitor those addresses. To save GPIO lines, one could have an abbreviated set of address lines and have board logic or a GAL/PAL to signal when the rest of the range is reached. If the MCU can use pins or pin masks to trigger interrupts, it could watch for the signal and then jump to the associated handler of the other lines. If it can do a pin-direct or pin-indexed jump, that could help.


Any suggestions or ways of narrowing down ideas? I'd like to do a TTL (and/or partially ROM-based) CPU if that is still an option, but I have no problem relegating most I/O to at least one microcontroller. I've considered the RP2350B for that role since dual-core should allow for bus sniffing, video, audio, keyboard, storage, and maybe some math coprocessing, graphics primitives, or even display list handling. The RP2050B is more suitable than the RP2040 since it has 16 more GPIO pins, may have a few more instructions, and is rated for 150 MHz vs. 133. However, I do understand there is some errata related to using negative-biased pins for inputs. If they are floating, they may latch up. It is not a true latch-up condition (ie, not destructive). Workarounds include adding external pull-down resistors (the internal ones were miscalculated due to voltage leakage) or repetitively turning the entire pad on and off (as in, enable, read, disable).

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u/Girl_Alien — 13 days ago